INTEL Logic Optimizing Compiler Utilization Report                 toggleff.rpt
FIT Release [ 4.0 ] SID [ 268 ]


***** Design implemented successfully


******************************* ERROR REPORT *******************************


WARNING E7200-FITENGN: 9 Unused Input(s). They use a pin, but do not feed anything.
SIGNALS: SB, RB, UNUSED0, UNUSED1, UNUSED2, UNUSED3, UNUSED4, UNUSED5, 
        INV2


****************************** PART DESCRIPTION ******************************


         1             7
         1      1      5
         _______________
     12 |       o       | 74
        |               |
        |               |
        |               |
        |               |
        |               |
        |               |
     32 |_______________| 54
         3             5
         3             3
            EPX780LC84

*** CMOS Device:  Ground unused inputs and I/Os ***
     VCC   = VCC power (3 or 5 volt)             
     VCCoX = VCC power for CFB I/Os
     GND   = Connect to GND plane                 
     VPP   = Connect to VPP signal, VCC, or leave unconnected.
             Do NOT connect to GND.
     gnd   = an unused input or I/O pin.  Ensure termination

 V - represents signal voltage          O - represents an Open Drain output

PIN SIGNAL      V O PIN SIGNAL      V O PIN SIGNAL      V O PIN SIGNAL      V O 

1   gnd            |22  gnd            |43  INV0           |64  gnd            |
2   VCCo1          |23  GND            |44  VCCo6          |65  GND            |
3   (CLK1)         |24  VCCo2          |45  (CLK2)         |66  VCCo5          |
4   (VPP)          |25  VCCo0/4        |46  GND            |67  VCCo3/7        |
5   gnd            |26  VCC            |47  CLOCK          |68  VCC            |
6   gnd            |27  gnd            |48  UNUSED0        |69  gnd            |
7   gnd            |28  gnd            |49  UNUSED1        |70  gnd            |
8   gnd            |29  GND            |50  UNUSED2        |71  GND            |
9   gnd            |30  gnd            |51  UNUSED3        |72  gnd            |
10  (TDO)          |31  gnd            |52  (TMS)          |73  gnd            |
11  (TDI)          |32  gnd            |53  (TCK)          |74  gnd            |
12  gnd            |33  SB             |54  RB             |75  gnd            |
13  gnd            |34  Q              |55  INV2           |76  gnd            |
14  gnd            |35  QB             |56  D              |77  UNUSED4        |
15  gnd            |36  AND1           |57  gnd            |78  UNUSED5        |
16  gnd            |37  AND0           |58  gnd            |79  gnd            |
17  GND            |38  GND            |59  GND            |80  GND            |
18  gnd            |39  N94_INV2       |60  gnd            |81  gnd            |
19  gnd            |40  INV1           |61  gnd            |82  gnd            |
20  gnd            |41  NAND1          |62  gnd            |83  gnd            |
21  gnd            |42  NAND0          |63  gnd            |84  gnd            |


****************************** PIN ASSIGNMENTS ******************************

**OUTPUTS**

Signal       Pin   V   D  Type   PTerms  [nu,up,lo,nl]  Blk  MCell

NAND0        42           C      2       [ 0, 1, 0, 0]    6  1    
NAND1        41           C      2       [ 0, 1, 0, 0]    6  2    
AND0         37           C      1       [ 0, 1, 0, 0]    6  5    
AND1         36           C      1       [ 0, 1, 0, 0]    6  6    
INV0         43           C      1       [ 0, 1, 0, 0]    6  0    
INV1         40           C      1       [ 0, 1, 0, 0]    6  3    
N94_INV2     39           C      1       [ 0, 1, 0, 0]    6  4    
Q            34           C      2       [ 0, 1, 0, 0]    6  8    
QB           35           C      2       [ 0, 1, 0, 0]    6  7    


**INPUTS**

Signal         Pin  V  Level Blk

CLOCK          47               
SB             33               
RB             54               
UNUSED0        48               
UNUSED1        49               
UNUSED2        50               
UNUSED3        51               
UNUSED4        77               
UNUSED5        78               
INV2           55               
D              56               


**UNUSED RESOURCES**

      Pin  Macrocell                     Pin  Macrocell

        5    IO00                          -    IO01                  
        -    IO02                          6    IO03                  
        -    IO04                          7    IO05                  
        -    IO06                          8    IO07                  
        -    IO08                          9    IO09                  
        1    IO10                         84    IO11                  
       83    IO12                         82    IO13                  
       81    IO14                         79    IO15                  
        -    IO16                          -    IO17                  
       76    IO18                         75    IO19                  
       22    IO20                         21    IO21                  
       20    IO22                         19    IO23                  
       18    IO24                         16    IO25                  
       15    IO26                         14    IO27                  
       13    IO28                         12    IO29                  
       69    IO30                          -    IO31                  
        -    IO32                         70    IO33                  
        -    IO34                         72    IO35                  
        -    IO36                         73    IO37                  
        -    IO38                         74    IO39                  
       27    IO40                          -    IO41                  
        -    IO42                         28    IO43                  
        -    IO44                         30    IO45                  
        -    IO46                         31    IO47                  
        -    IO48                         32    IO49                  
       64    IO50                         63    IO51                  
       62    IO52                         61    IO53                  
       60    IO54                         58    IO55                  
       57    IO56                          -    IO57                  
        -    IO58                          -    IO59                  
        -    IO69                          -    IO70                  
        -    IO71                          -    IO72                  
        -    IO73                          -    IO74                  
        -    IO75                          -    IO76                  
        -    IO77                          -    IO78                  
        -    IO79                          3    -       (CLK1      )  
       45    -       (CLK2      )  

       42  : 71  Totals unused


****************************** CFB INFORMATION ******************************



**CFB Descriptions**

 CFB #
 0                   1                   2                   3                  
--------------------------------------------------------------------------------
                   |                   |                   |                   |
                   |                   |                   |                   |
                   |                   |                   |                   |
                   |                   |                   |                   |
                   |                   |                   |                   |
                   |                   |                   |                   |
                   |                   |                   |                   |
                   |                   |                   |                   |
                   |                   |                   |                   |


 CFB #
 4                   5                   6                   7                  
--------------------------------------------------------------------------------
                   |                   |IO68  Q            |                   |
                   |                   |IO60  INV0         |                   |
                   |                   |IO61  NAND0        |                   |
                   |                   |IO62  NAND1        |                   |
                   |                   |IO63  INV1         |                   |
                   |                   |IO64  N94_INV2     |                   |
                   |                   |IO65  AND0         |                   |
                   |                   |IO66  AND1         |                   |
                   |                   |IO67  QB           |                   |


**CFB fanins**

         | CFB #
         |  0                1                2                3              
------------------------------------------------------------------------------
%0       |                |                |                |                |
%1       |                |                |                |                |
%2       |                |                |                |                |
%3       |                |                |                |                |
%4       |                |                |                |                |
%5       |                |                |                |                |
%6       |                |                |                |                |
%7       |                |                |                |                |
%8       |                |                |                |                |
%9       |                |                |                |                |
%10      |                |                |                |                |
%11      |                |                |                |                |
%12      |                |                |                |                |
%13      |                |                |                |                |
%14      |                |                |                |                |
%15      |                |                |                |                |
%16      |                |                |                |                |
%17      |                |                |                |                |
%18      |                |                |                |                |
%19      |                |                |                |                |
%20      |                |                |                |                |
%21      |                |                |                |                |
%22      |                |                |                |                |
%23      |                |                |                |                |


         | CFB #
         |  4                5                6                7              
------------------------------------------------------------------------------
%0       |                |                | NAND0.FB       |                |
%1       |                |                | QB.FB          |                |
%2       |                |                | CLOCK.INT      |                |
%3       |                |                | AND0.FB        |                |
%4       |                |                | AND1.FB        |                |
%5       |                |                | INV0.FB        |                |
%6       |                |                | INV1.FB        |                |
%7       |                |                | D.INT          |                |
%8       |                |                | N94_INV2.FB    |                |
%9       |                |                | NAND1.FB       |                |
%10      |                |                | Q.FB           |                |
%11      |                |                |                |                |
%12      |                |                |                |                |
%13      |                |                |                |                |
%14      |                |                |                |                |
%15      |                |                |                |                |
%16      |                |                |                |                |
%17      |                |                |                |                |
%18      |                |                |                |                |
%19      |                |                |                |                |
%20      |                |                |                |                |
%21      |                |                |                |                |
%22      |                |                |                |                |
%23      |                |                |                |                |

***************************** DESIGN STATISTICS *****************************

    Inputs ........... 11
    Outputs ..........  9
    Active Pins (in+out) .... 20

           Combinatorial....  9
           D flip-flops ....  0
           T flip-flops ....  0
         J/K (emulation) ...  0
    Total Macrocells ............  9         Buried Macrocells ...  0
    (includes SRAM Macrocells ... 0 )

    Largest Product Term ...  2
    Macrocell Product Terms (1-16): 5, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
    Total Product Terms >16       : 0

INTEL Logic Optimizing Compiler Utilization Report                 toggleff.rpt
FIT Release [ 4.0 ] SID [ 268 ]

;---------------------------------------------------------
; THIS FILES DESCRIBES A TOGGLE FLIPFLOP MADE FROM AN
; EDGE-TRIGGERED S-R FLIP-FLOP
;---------------------------------------------------------
TITLE   EDGE-TRIGGERED TOGGLE FLIP-FLOP
OPTIONS
    EXPAND = ON
    INVERSION = OFF
    DT_SYNTHESIS = ON
    MINIMIZATION = ON
    FITTER_PINS = TRY
    FITTER_PREV_PINS = OFF
    FITTER_ALGORITHM = NORMAL
    SECURITY = OFF


;  ( part was NFX780_84 before conversion ) 
CHIP  toggleff EPX780LC84

PIN         47    CLOCK      
PIN         33    SB         
PIN         54    RB         
PIN    [48:51]    UNUSED[0:3]
PIN    [77:78]    UNUSED[4:5]
PIN         55    INV2       
PIN         56    D          

PIN    [42:41]    NAND[0:1]  
PIN    [37:36]    AND[0:1]   
PIN         43    INV0       
PIN         40    INV1       
PIN         39    N94_INV2   
PIN         34    Q          
PIN         35    QB         

EQUATIONS

NAND0 = /AND0
      + /CLOCK
NAND0.TRST = VCC

NAND1 = /AND1
      + /CLOCK
NAND1.TRST = VCC

AND0 = /D * N94_INV2
AND0.TRST = VCC

AND1 = D * N94_INV2
AND1.TRST = VCC

INV0 = /CLOCK
INV0.TRST = VCC

INV1 = /INV0
INV1.TRST = VCC

N94_INV2 = /INV1
N94_INV2.TRST = VCC

Q = /NAND0
  + /QB
Q.TRST = VCC

QB = /NAND1
   + /Q
QB.TRST = VCC

SIMULATION

    TRACE_ON CLOCK SB RB NAND0 NAND1 D AND0 AND1 INV2 Q QB 
    SETF CLOCK D 
    SETF /CLOCK D 
    SETF CLOCK /D 
    SETF /CLOCK /D 
    FOR I := 0 TO 10 DO
        BEGIN
        SETF CLOCK 
        SETF /CLOCK 
        END
