INTEL Logic Optimizing Compiler Utilization Report                 LEDALNUM.rpt
FIT Release [ 4.0 ] SID [ 268 ]


***** Unable to implement design


******************************* ERROR REPORT *******************************


ERROR E7420-FIT: CFB 6 Allocation failed:  5
ERROR E7430-FIT: Could not place assigned I/O input: UNUSED1
ERROR E7301-FITENGN: Some signals were not assigned to any pin.
        The Fitter could neither find nor use any resources for these signals.
SIGNAL: S4
ERROR E7300-FITENGN: Some signals could not be placed into any device resource.
        The Fitter encountered problems when trying to assign resources
        for these signals.
SIGNALS: UNUSED1, S4
WARNING E7200-FITENGN: 2 Unused Input(s). They use a pin, but do not feed anything.
SIGNALS: UNUSED0, UNUSED1
ERROR E7244-FITENGN: Could not complete allocation, nodes did not fit.
SIGNALS: S6, S3, S5, S2, S1, S0
ERROR E7366-FITENGN: S4.C Equation on macrocell 64 too big;  9 used / 8 maximum.
ERROR E7213-FITENGN: SIGNAL UNUSED1 cannot be put on PIN 77,
        pin already used by SIGNAL UNUSED0.


****************************** PART DESCRIPTION ******************************


         1             7
         1      1      5
         _______________
     12 |       o       | 74
        |               |
        |               |
        |               |
        |               |
        |               |
        |               |
     32 |_______________| 54
         3             5
         3             3
            EPX780LC84

*** CMOS Device:  Ground unused inputs and I/Os ***
     VCC   = VCC power (3 or 5 volt)             
     VCCoX = VCC power for CFB I/Os
     GND   = Connect to GND plane                 
     VPP   = Connect to VPP signal, VCC, or leave unconnected.
             Do NOT connect to GND.
     gnd   = an unused input or I/O pin.  Ensure termination

 V - represents signal voltage          O - represents an Open Drain output

PIN SIGNAL      V O PIN SIGNAL      V O PIN SIGNAL      V O PIN SIGNAL      V O 

1   gnd            |22  gnd            |43  gnd            |64  gnd            |
2   VCCo1          |23  GND            |44  VCCo6          |65  GND            |
3   (CLK1)         |24  VCCo2          |45  (CLK2)         |66  VCCo5          |
4   (VPP)          |25  VCCo0/4        |46  GND            |67  VCCo3/7        |
5   gnd            |26  VCC            |47  D0             |68  VCC            |
6   gnd            |27  gnd            |48  D1             |69  gnd            |
7   gnd            |28  gnd            |49  D2             |70  gnd            |
8   gnd            |29  GND            |50  D3             |71  GND            |
9   gnd            |30  gnd            |51  D4             |72  gnd            |
10  (TDO)          |31  gnd            |52  (TMS)          |73  gnd            |
11  (TDI)          |32  gnd            |53  (TCK)          |74  gnd            |
12  gnd            |33  gnd            |54  gnd            |75  gnd            |
13  gnd            |34  S0             |55  gnd            |76  gnd            |
14  gnd            |35  S1             |56  gnd            |77  UNUSED1        |
15  gnd            |36  S2             |57  gnd            |78  gnd            |
16  gnd            |37  S3             |58  gnd            |79  gnd            |
17  GND            |38  GND            |59  GND            |80  GND            |
18  gnd            |39  S4             |60  gnd            |81  gnd            |
19  gnd            |40  S5             |61  gnd            |82  gnd            |
20  gnd            |41  S6             |62  gnd            |83  gnd            |
21  gnd            |42  gnd            |63  gnd            |84  gnd            |


****************************** PIN ASSIGNMENTS ******************************

**OUTPUTS**

Signal       Pin   V   D  Type   PTerms  [nu,up,lo,nl]  Blk  MCell

S6           41           C      8       [ 0, 0, 0, 0]    6  2    
S5           40           C      6       [ 0, 0, 0, 0]    6  3    
S4           *            C      9       [ 0, 0, 0, 0]       4    
S3           37           C      7       [ 0, 0, 0, 0]    6  5    
S2           36           C      7       [ 0, 0, 0, 0]    6  6    
S1           35           C      5       [ 0, 0, 0, 0]    6  7    
S0           34           C      6       [ 0, 0, 0, 0]    6  8    


**INPUTS**

Signal         Pin  V  Level Blk

D4             51               
D3             50               
D2             49               
D1             48               
D0             47               
UNUSED0        77               
UNUSED1        *                


**UNUSED RESOURCES**

      Pin  Macrocell                     Pin  Macrocell

        5    IO00                          -    IO01                  
        -    IO02                          6    IO03                  
        -    IO04                          7    IO05                  
        -    IO06                          8    IO07                  
        -    IO08                          9    IO09                  
        1    IO10                         84    IO11                  
       83    IO12                         82    IO13                  
       81    IO14                         79    IO15                  
       78    IO16                          -    IO17                  
       76    IO18                         75    IO19                  
       22    IO20                         21    IO21                  
       20    IO22                         19    IO23                  
       18    IO24                         16    IO25                  
       15    IO26                         14    IO27                  
       13    IO28                         12    IO29                  
       69    IO30                          -    IO31                  
        -    IO32                         70    IO33                  
        -    IO34                         72    IO35                  
        -    IO36                         73    IO37                  
        -    IO38                         74    IO39                  
       27    IO40                          -    IO41                  
        -    IO42                         28    IO43                  
        -    IO44                         30    IO45                  
        -    IO46                         31    IO47                  
        -    IO48                         32    IO49                  
       64    IO50                         63    IO51                  
       62    IO52                         61    IO53                  
       60    IO54                         58    IO55                  
       57    IO56                         56    IO57                  
       55    IO58                         54    IO59                  
       43    IO60                         42    IO61                  
       39    IO64                          -    IO69                  
        -    IO70                          -    IO71                  
        -    IO72                          -    IO73                  
        -    IO74                          -    IO75                  
        -    IO76                          -    IO77                  
        -    IO78                          -    IO79                  
        3    -       (CLK1      )         45    -       (CLK2      )  

       49  : 74  Totals unused


****************************** CFB INFORMATION ******************************



**CFB Descriptions**

 CFB #
 0                   1                   2                   3                  
--------------------------------------------------------------------------------
                   |                   |                   |                   |
                   |                   |                   |                   |
                   |                   |                   |                   |
                   |                   |                   |                   |
                   |                   |                   |                   |
                   |                   |                   |                   |


 CFB #
 4                   5                   6                   7                  
--------------------------------------------------------------------------------
                   |                   |IO62  S6           |                   |
                   |                   |IO65  S3           |                   |
                   |                   |IO63  S5           |                   |
                   |                   |IO66  S2           |                   |
                   |                   |IO67  S1           |                   |
                   |                   |IO68  S0           |                   |


**CFB fanins**

         | CFB #
         |  0                1                2                3              
------------------------------------------------------------------------------
%0       |                |                |                |                |
%1       |                |                |                |                |
%2       |                |                |                |                |
%3       |                |                |                |                |
%4       |                |                |                |                |
%5       |                |                |                |                |
%6       |                |                |                |                |
%7       |                |                |                |                |
%8       |                |                |                |                |
%9       |                |                |                |                |
%10      |                |                |                |                |
%11      |                |                |                |                |
%12      |                |                |                |                |
%13      |                |                |                |                |
%14      |                |                |                |                |
%15      |                |                |                |                |
%16      |                |                |                |                |
%17      |                |                |                |                |
%18      |                |                |                |                |
%19      |                |                |                |                |
%20      |                |                |                |                |
%21      |                |                |                |                |
%22      |                |                |                |                |
%23      |                |                |                |                |


         | CFB #
         |  4                5                6                7              
------------------------------------------------------------------------------
%0       |                |                | D4.INT         |                |
%1       |                |                | D3.INT         |                |
%2       |                |                | D0.INT         |                |
%3       |                |                | D2.INT         |                |
%4       |                |                | D1.INT         |                |
%5       |                |                |                |                |
%6       |                |                |                |                |
%7       |                |                |                |                |
%8       |                |                |                |                |
%9       |                |                |                |                |
%10      |                |                |                |                |
%11      |                |                |                |                |
%12      |                |                |                |                |
%13      |                |                |                |                |
%14      |                |                |                |                |
%15      |                |                |                |                |
%16      |                |                |                |                |
%17      |                |                |                |                |
%18      |                |                |                |                |
%19      |                |                |                |                |
%20      |                |                |                |                |
%21      |                |                |                |                |
%22      |                |                |                |                |
%23      |                |                |                |                |

***************************** DESIGN STATISTICS *****************************

    Inputs ...........  7
    Outputs ..........  7
    Active Pins (in+out) .... 14

           Combinatorial....  7
           D flip-flops ....  0
           T flip-flops ....  0
         J/K (emulation) ...  0
    Total Macrocells ............  7         Buried Macrocells ...  0
    (includes SRAM Macrocells ... 0 )

    Largest Product Term ...  9
    Macrocell Product Terms (1-16): 0, 0, 0, 0, 1, 2, 2, 1, 1, 0, 0, 0, 0, 0, 0, 0
    Total Product Terms >16       : 0

INTEL Logic Optimizing Compiler Utilization Report                 LEDALNUM.rpt
FIT Release [ 4.0 ] SID [ 268 ]

;---------------------------------------------------------
; THIS DESIGN DECODES A 4-BIT NUMBER INTO 7 SIGNALS WHICH
; CAN DRIVE A 7-SEGMENT LED DIGIT.  THE LEDS IN THE DIGIT
; SHOULD LIGHT IN A PATTERN THAT REPRESENTS THE NUMBER.
;---------------------------------------------------------
TITLE   7-SEGMENT LED DECODER

;-- BEGINNING OF LED DECODER MODULE ---------------------
OPTIONS
    EXPAND = ON
    INVERSION = ON
    DT_SYNTHESIS = ON
    MINIMIZATION = ON
    FITTER_PINS = KEEP
    FITTER_PREV_PINS = ON
    FITTER_ALGORITHM = NORMAL


;  ( part was NFX780_84 before conversion ) 
CHIP  LEDALNUM EPX780LC84

PIN    [51:47]    D[4:0] 
PIN         77    UNUSED0
PIN         77    UNUSED1

PIN    [41:39]    S[6:4] 
PIN    [37:34]    S[3:0] 

EQUATIONS

/S6 = D4 * /D3 * D0
    + /D4 * D3 * D2 * /D1 * D0
    + D4 * D3 * /D2 * /D1 * /D0
    + /D3 * D2 * /D1 * /D0
    + D4 * /D3 * /D2 * D1
    + D4 * D3 * D2 * D1
    + D3 * /D2 * D1 * D0
    + /D3 * /D2 * /D1 * D0
S6.TRST = VCC

/S5 = /D4 * D3 * D2 * /D1 * D0
    + D4 * D3 * /D2 * /D1 * /D0
    + /D4 * /D3 * /D2 * D0
    + D4 * /D2 * D1 * D0
    + /D3 * /D2 * D1
    + /D3 * D1 * D0
S5.TRST = VCC

S4 = D3 * /D2 * D1 * /D0
   + /D4 * /D2 * /D0
   + D4 * D2 * D1 * /D0
   + D4 * D3 * D2 * D1
   + /D4 * /D3 * /D1 * /D0
   + /D4 * D3 * /D1 * D0
   + /D4 * /D3 * D1 * D0
   + /D2 * /D1 * D0
   + /D3 * /D2 * D0
S4.TRST = VCC

/S3 = /D3 * /D2 * /D1 * /D0
    + /D4 * D3 * D2 * /D1 * /D0
    + /D4 * /D3 * D2 * D1 * D0
    + D4 * D2 * /D1 * D0
    + D4 * D2 * D1 * /D0
    + /D4 * /D3 * /D2 * /D1
    + D4 * /D3 * /D2 * D1
S3.TRST = VCC

S2 = D4 * /D1 * D0
   + D3 * /D2 * D1 * D0
   + /D4 * /D2 * /D0
   + /D4 * D3 * D2
   + D4 * /D2 * /D1
   + D4 * /D3 * D2
   + D2 * D1 * /D0
S2.TRST = VCC

/S1 = /D4 * /D3 * /D2 * D1 * /D0
    + D4 * D2 * /D1 * D0
    + /D4 * D3 * D2 * D1
    + /D4 * D3 * D2 * /D0
    + D4 * D3 * /D2 * D0
S1.TRST = VCC

/S0 = D4 * /D3 * D1 * /D0
    + /D3 * /D2 * /D1 * D0
    + /D3 * D2 * /D1 * /D0
    + D3 * /D2 * D1 * /D0
    + D4 * D3 * D0
    + D2 * D1 * D0
S0.TRST = VCC

SIMULATION

    VECTOR D := [ D4 D3 D2 D1 D0 ]
    FOR I := 0 TO 15 DO
        BEGIN
        SETF D := I 
        END
