INTEL Logic Optimizing Compiler Utilization Report                  COUNTER.rpt
FIT Release [ 4.0 ] SID [ 268 ]


***** Design implemented successfully


******************************* ERROR REPORT *******************************



No errors found.


****************************** PART DESCRIPTION ******************************


         1             7
         1      1      5
         _______________
     12 |       o       | 74
        |               |
        |               |
        |               |
        |               |
        |               |
        |               |
     32 |_______________| 54
         3             5
         3             3
            EPX780LC84

*** CMOS Device:  Ground unused inputs and I/Os ***
     VCC   = VCC power (3 or 5 volt)             
     VCCoX = VCC power for CFB I/Os
     GND   = Connect to GND plane                 
     VPP   = Connect to VPP signal, VCC, or leave unconnected.
             Do NOT connect to GND.
     gnd   = an unused input or I/O pin.  Ensure termination

 V - represents signal voltage          O - represents an Open Drain output

PIN SIGNAL      V O PIN SIGNAL      V O PIN SIGNAL      V O PIN SIGNAL      V O 

1   gnd            |22  gnd            |43  NXT2           |64  gnd            |
2   VCCo1          |23  GND            |44  VCCo6          |65  GND            |
3   (CLK1)         |24  VCCo2          |45  (CLK2)         |66  VCCo5          |
4   (VPP)          |25  VCCo0/4        |46  GND            |67  VCCo3/7        |
5   CNT0           |26  VCC            |47  CLOCK          |68  VCC            |
6   CNT1           |27  gnd            |48  RESET          |69  gnd            |
7   CNT2           |28  gnd            |49  gnd            |70  gnd            |
8   gnd            |29  GND            |50  gnd            |71  GND            |
9   gnd            |30  gnd            |51  gnd            |72  gnd            |
10  (TDO)          |31  gnd            |52  (TMS)          |73  gnd            |
11  (TDI)          |32  gnd            |53  (TCK)          |74  gnd            |
12  gnd            |33  NXT0           |54  gnd            |75  gnd            |
13  gnd            |34  S0             |55  gnd            |76  gnd            |
14  gnd            |35  S1             |56  gnd            |77  gnd            |
15  gnd            |36  S2             |57  gnd            |78  gnd            |
16  gnd            |37  S3             |58  gnd            |79  gnd            |
17  GND            |38  GND            |59  GND            |80  GND            |
18  gnd            |39  S4             |60  gnd            |81  gnd            |
19  gnd            |40  S5             |61  gnd            |82  gnd            |
20  gnd            |41  S6             |62  gnd            |83  gnd            |
21  gnd            |42  NXT1           |63  gnd            |84  gnd            |


****************************** PIN ASSIGNMENTS ******************************

**OUTPUTS**

Signal       Pin   V   D  Type   PTerms  [nu,up,lo,nl]  Blk  MCell

CNT0         5            D      1       [ 0, 1, 0, 0]    0  0    
CNT1         6            D      1       [ 0, 1, 0, 0]    0  3    
CNT2         7            D      1       [ 0, 1, 0, 0]    0  5    
NXT0         33           C      1       [ 0, 0, 1, 0]    6  9    
NXT1         42           C      2       [ 0, 1, 0, 0]    6  1    
NXT2         43           C      3       [ 0, 1, 0, 0]    6  0    
S6           41           C      2       [ 0, 1, 0, 0]    6  2    
S5           40           C      3       [ 0, 1, 0, 1]    6  3    
S4           39           C      2       [ 0, 1, 0, 0]    6  4    
S3           37           C      2       [ 0, 1, 0, 0]    6  5    
S2           36           C      2       [ 0, 1, 0, 0]    6  6    
S1           35           C      1       [ 0, 1, 0, 0]    6  7    
S0           34           C      3       [ 0, 1, 0, 1]    6  8    


**INPUTS**

Signal         Pin  V  Level Blk

CLOCK          47               
RESET          48               


**UNUSED RESOURCES**

      Pin  Macrocell                     Pin  Macrocell

        -    IO01                          -    IO02                  
        -    IO04                          -    IO06                  
        8    IO07                          -    IO08                  
        9    IO09                          1    IO10                  
       84    IO11                         83    IO12                  
       82    IO13                         81    IO14                  
       79    IO15                         78    IO16                  
       77    IO17                         76    IO18                  
       75    IO19                         22    IO20                  
       21    IO21                         20    IO22                  
       19    IO23                         18    IO24                  
       16    IO25                         15    IO26                  
       14    IO27                         13    IO28                  
       12    IO29                         69    IO30                  
        -    IO31                          -    IO32                  
       70    IO33                          -    IO34                  
       72    IO35                          -    IO36                  
       73    IO37                          -    IO38                  
       74    IO39                         27    IO40                  
        -    IO41                          -    IO42                  
       28    IO43                          -    IO44                  
       30    IO45                          -    IO46                  
       31    IO47                          -    IO48                  
       32    IO49                         64    IO50                  
       63    IO51                         62    IO52                  
       61    IO53                         60    IO54                  
       58    IO55                         57    IO56                  
       56    IO57                         55    IO58                  
       54    IO59                          -    IO70                  
        -    IO71                          -    IO72                  
        -    IO73                          -    IO74                  
       49    IO75                          -    IO76                  
       50    IO77                          -    IO78                  
       51    IO79                          3    -       (CLK1      )  
       45    -       (CLK2      )  

       47  : 67  Totals unused


****************************** CFB INFORMATION ******************************



**CFB Descriptions**

 CFB #
 0                   1                   2                   3                  
--------------------------------------------------------------------------------
IO00  CNT0         |                   |                   |                   |
IO03  CNT1         |                   |                   |                   |
IO05  CNT2         |                   |                   |                   |
                   |                   |                   |                   |
                   |                   |                   |                   |
                   |                   |                   |                   |
                   |                   |                   |                   |
                   |                   |                   |                   |
                   |                   |                   |                   |
                   |                   |                   |                   |


 CFB #
 4                   5                   6                   7                  
--------------------------------------------------------------------------------
                   |                   |IO62  S6           |                   |
                   |                   |IO63  S5           |                   |
                   |                   |IO64  S4           |                   |
                   |                   |IO65  S3           |                   |
                   |                   |IO66  S2           |                   |
                   |                   |IO67  S1           |                   |
                   |                   |IO68  S0           |                   |
                   |                   |IO60  NXT2         |                   |
                   |                   |IO61  NXT1         |                   |
                   |                   |IO69  NXT0         |                   |


**CFB Control Signals**

CFB # 0 Controls
Signal                     Equation
------------               --------
Sync. Clock 1        :  -
Sync. Clock 2        :  -
Async. Clock 1 pterm : CNT2.ACLK




**CFB fanins**

         | CFB #
         |  0                1                2                3              
------------------------------------------------------------------------------
%0       | CLOCK.INT      |                |                |                |
%1       | NXT0.FB        |                |                |                |
%2       | NXT1.FB        |                |                |                |
%3       | NXT2.FB        |                |                |                |
%4       |                |                |                |                |
%5       |                |                |                |                |
%6       |                |                |                |                |
%7       |                |                |                |                |
%8       |                |                |                |                |
%9       |                |                |                |                |
%10      |                |                |                |                |
%11      |                |                |                |                |
%12      |                |                |                |                |
%13      |                |                |                |                |
%14      |                |                |                |                |
%15      |                |                |                |                |
%16      |                |                |                |                |
%17      |                |                |                |                |
%18      |                |                |                |                |
%19      |                |                |                |                |
%20      |                |                |                |                |
%21      |                |                |                |                |
%22      |                |                |                |                |
%23      |                |                |                |                |


         | CFB #
         |  4                5                6                7              
------------------------------------------------------------------------------
%0       |                |                | CNT2.FB        |                |
%1       |                |                | CNT1.FB        |                |
%2       |                |                | CNT0.FB        |                |
%3       |                |                | RESET.INT      |                |
%4       |                |                |                |                |
%5       |                |                |                |                |
%6       |                |                |                |                |
%7       |                |                |                |                |
%8       |                |                |                |                |
%9       |                |                |                |                |
%10      |                |                |                |                |
%11      |                |                |                |                |
%12      |                |                |                |                |
%13      |                |                |                |                |
%14      |                |                |                |                |
%15      |                |                |                |                |
%16      |                |                |                |                |
%17      |                |                |                |                |
%18      |                |                |                |                |
%19      |                |                |                |                |
%20      |                |                |                |                |
%21      |                |                |                |                |
%22      |                |                |                |                |
%23      |                |                |                |                |

***************************** DESIGN STATISTICS *****************************

    Inputs ...........  2
    Outputs .......... 13
    Active Pins (in+out) .... 15

           Combinatorial.... 10
           D flip-flops ....  3
           T flip-flops ....  0
         J/K (emulation) ...  0
    Total Macrocells ............ 13         Buried Macrocells ...  0
    (includes SRAM Macrocells ... 0 )

    Largest Product Term ...  3
    Macrocell Product Terms (1-16): 5, 5, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
    Total Product Terms >16       : 0

INTEL Logic Optimizing Compiler Utilization Report                  COUNTER.rpt
FIT Release [ 4.0 ] SID [ 268 ]

;---------------------------------------------------------
; NOW WE'LL USE THE COMBINATIONAL INCREMENTER MODULE TO
; BUILD A RESETABLE COUNTER.
;---------------------------------------------------------
OPTIONS
    EXPAND = ON
    INVERSION = ON
    DT_SYNTHESIS = ON
    MINIMIZATION = ON
    FITTER_PINS = KEEP
    FITTER_PREV_PINS = ON
    FITTER_ALGORITHM = NORMAL
    SECURITY = OFF


;  ( part was NFX780_84 before conversion ) 
CHIP  COUNTER EPX780LC84

PIN         47    CLOCK   
PIN         48    RESET   

PIN      [5:7]    CNT[0:2]
PIN         33    NXT0    
PIN    [42:43]    NXT[1:2]
PIN    [41:39]    S[6:4]  
PIN    [37:34]    S[3:0]  

EQUATIONS

CNT0.D := NXT0
CNT0.ACLK = CLOCK
CNT0.RSTF = GND
CNT0.SETF = GND
CNT0.TRST = VCC

CNT1.D := NXT1
CNT1.ACLK = CLOCK
CNT1.RSTF = GND
CNT1.SETF = GND
CNT1.TRST = VCC

CNT2.D := NXT2
CNT2.ACLK = CLOCK
CNT2.RSTF = GND
CNT2.SETF = GND
CNT2.TRST = VCC

NXT0 = /RESET * /CNT0
NXT0.TRST = VCC

NXT1 = /RESET * /CNT1 * CNT0
     + /RESET * CNT1 * /CNT0
NXT1.TRST = VCC

NXT2 = /RESET * /CNT2 * CNT1 * CNT0
     + /RESET * CNT2 * /CNT1
     + /RESET * CNT2 * /CNT0
NXT2.TRST = VCC

/S6 = /CNT2 * /CNT1 * CNT0
    + CNT2 * /CNT1 * /CNT0
S6.TRST = VCC

S5 = /CNT1 * /CNT0
   + CNT2 * /CNT1
   + CNT2 * /CNT0
S5.TRST = VCC

/S4 = CNT2 * /CNT1 * CNT0
    + CNT2 * CNT1 * /CNT0
S4.TRST = VCC

/S3 = CNT2 * CNT1 * CNT0
    + /CNT2 * /CNT1
S3.TRST = VCC

S2 = /CNT2 * /CNT0
   + CNT1 * /CNT0
S2.TRST = VCC

/S1 = /CNT2 * CNT1 * /CNT0
S1.TRST = VCC

/S0 = /CNT2 * /CNT1 * CNT0
    + CNT2 * /CNT1 * /CNT0
    + CNT2 * CNT1 * CNT0
S0.TRST = VCC

SIMULATION

    VECTOR CNT := [ CNT2 CNT1 CNT0 ]
    TRACE_ON CLOCK CNT 
    SETF /CLOCK 
    SETF RESET 
    CLOCKF CLOCK 
    SETF /RESET 
    FOR I := 0 TO 20 DO
        BEGIN
        CLOCKF CLOCK 
        END
